Reliable and efficient system-on-chip design

Naresh R. Shanbhag

doi:10.1109/MC.2004.1274003

Reliable and efficient system-on-chip design

Research output: Contribution to specialist publication › Article

Abstract

The semiconductor industry faces numerous challenges in developing reliable, energy-efficent SoC designs that are on a par with modern communications systems. Researchers must explore the tradeoffs between reliability and energy efficiency at the device, circuit, architectural, algorithmic, and system levels to develop a reliability-energy "knob" that can be synergistically tuned to meet such requirements at each level of the design hierarchy. As such, elegant and practical solutions will require the application of coding and communication-theoretic techniques to the design of SoC components.

Original language	English (US)
Pages	42-50
Number of pages	9
Volume	37
No	3
Specialist publication	Computer
DOIs	https://doi.org/10.1109/MC.2004.1274003
State	Published - Mar 1 2004

ASJC Scopus subject areas

Computer Science(all)

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10.1109/MC.2004.1274003

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