TY - GEN
T1 - Register multimapping
T2 - 2009 IEEE 7th Symposium on Application Specific Processors, SASP 2009
AU - Duong, Nam
AU - Kumar, Rakesh
PY - 2009
Y1 - 2009
N2 - In this paper, we investigate Register Multimapping as a technique to reduce register bank conflicts for processors with large register files, but relatively slow clock speeds. Register multimapping involves mapping an architectural register to multiple physical registers belonging to different banks. Reads can proceed using any of the physical registers, thereby minimizing read bank conflicts. Write conflicts can be minimized by allowing delayed allocation of physical registers [5]. Our experiments show that register multimapping can result in performance improvements up to 15% (10% on average) over baseline processors that are port-constrained. Improvements are up to 13% (5.5% on average) over port-constrained processorsthat support delayed allocation of registers.
AB - In this paper, we investigate Register Multimapping as a technique to reduce register bank conflicts for processors with large register files, but relatively slow clock speeds. Register multimapping involves mapping an architectural register to multiple physical registers belonging to different banks. Reads can proceed using any of the physical registers, thereby minimizing read bank conflicts. Write conflicts can be minimized by allowing delayed allocation of physical registers [5]. Our experiments show that register multimapping can result in performance improvements up to 15% (10% on average) over baseline processors that are port-constrained. Improvements are up to 13% (5.5% on average) over port-constrained processorsthat support delayed allocation of registers.
UR - http://www.scopus.com/inward/record.url?scp=70350761824&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70350761824&partnerID=8YFLogxK
U2 - 10.1109/SASP.2009.5226335
DO - 10.1109/SASP.2009.5226335
M3 - Conference contribution
AN - SCOPUS:70350761824
SN - 9781424449385
T3 - 2009 IEEE 7th Symposium on Application Specific Processors, SASP 2009
SP - 50
EP - 53
BT - 2009 IEEE 7th Symposium on Application Specific Processors, SASP 2009
Y2 - 27 July 2009 through 28 July 2009
ER -