Abstract
Artificial intelligence applications have changed the landscape of computer design, driving a search for hardware architecture that can efficiently process large amounts of data. Three-dimensional heterogeneous integration with advanced packaging technologies could be used to improve data bandwidth among sensors, memory and processors. However, such systems are limited by a lack of hardware reconfigurability and the use of conventional von Neumann architectures. Here we report stackable hetero-integrated chips that use optoelectronic device arrays for chip-to-chip communication and neuromorphic cores based on memristor crossbar arrays for highly parallel data processing. With this approach, we create a system with stackable and replaceable chips that can directly classify information from a light-based image source. We also modify this system by inserting a preprogrammed neuromorphic denoising layer that improves the classification performance in a noisy environment. Our reconfigurable three-dimensional hetero-integrated technology can be used to vertically stack a diverse range of functional layers and could provide energy-efficient sensor computing systems for edge computing applications.
Original language | English (US) |
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Pages (from-to) | 386-393 |
Number of pages | 8 |
Journal | Nature Electronics |
Volume | 5 |
Issue number | 6 |
DOIs | |
State | Published - Jun 2022 |
Externally published | Yes |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Instrumentation
- Electrical and Electronic Engineering