Abstract
As real-time applications become more demanding, multiprocessors are being called upon to meet their increasingly stringent requirements. A simple but efficient architecture for building multiprocessors is to connect several processors to a common backplane bus. The backplane acts as a shared resource in this architecture and contention for its use by different bus modules must be resolved. In a real-time system, this backplane must also provide scheduling support such that the timing behavior of the resulting system is analyzable. In addition, the support primitives for real-time scheduling on a backplane bus must also be constrained by the economic considerations associated with a bus standard that is intended to support both time sharing and real-time applications. In this paper, we review the design considerations to support realtime systems in the IEEE Futurebus+ backplane specification and describe how this backplane can be used to satisfy timing constraints in priority-driven realtime systems.
Original language | English (US) |
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Title of host publication | 1990 Proceedings 11th Real-Time Systems Symposium, RTSS 1990 |
Pages | 331-340 |
Number of pages | 10 |
DOIs | |
State | Published - 1990 |
Externally published | Yes |
Event | 1990 11th Real-Time Systems Symposium, RTSS 1990 - Lake Buena Vista, FL, United States Duration: Dec 5 1990 → Dec 7 1990 |
Other
Other | 1990 11th Real-Time Systems Symposium, RTSS 1990 |
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Country/Territory | United States |
City | Lake Buena Vista, FL |
Period | 12/5/90 → 12/7/90 |
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Computer Networks and Communications