Push-assisted migration of real-time tasks in multi-core processors

Abhik Sarkar, Frank Mueller, Harini Ramaprasad, Sibin Mohan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Multicores are becoming ubiquitous, not only in general-purpose but also embedded computing. This trend is a refixion of contemporary embedded applications posing steadily increasing demands in processing power. On such platforms, prediction of timing behavior to ensure that deadlines of real-time tasks can be met is becoming increasingly difficult. While real-time multicore scheduling approaches help to assure deadlines based on firm theoretical properties, their reliance on task migration poses a significant challenge to timing predictability in practice. Task migration actually (a) reduces timing predictability for contemporary multicores due to cache warm-up overheads while (b) increasing traffic on the network-on-chip (NoC) interconnect. This paper puts forth a fundamentally new approach to increase the timing predictability of multicore architectures aimed at task migration in embedded environments. A task migration between two cores imposes cache warm-up overheads on the migration target, which can lead to missed deadlines for tight real-time schedules.We propose novel micro-architectural support to migrate cache lines. Our scheme shows dramatically increased predictability in the presence of cross-core migration. Experimental results for schedules demonstrate that our scheme enables real-time tasks to meet their deadlines in the presence of task migration. Our results illustrate that increases in execution time due to migration is reduced by our scheme to levels that may prevent deadline misses of real-time tasks that would otherwise occur. Our mechanism imposes an overhead at a fraction of the task's execution time, yet this overhead can be steered to fill idle slots in the schedule, i.e., it does not contribute to the execution time of the migrated task. Overall, our novel migration scheme provides a unique mechanism capable of significantly increasing timing predictability in the wake of task migration.

Original languageEnglish (US)
Title of host publicationLCTES'09 - Proceedings of the 2009 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems
Pages80-89
Number of pages10
DOIs
StatePublished - 2009
Event2009 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES'09 - Dublin, Ireland
Duration: Jun 19 2009Jun 20 2009

Publication series

NameProceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Other

Other2009 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES'09
Country/TerritoryIreland
CityDublin
Period6/19/096/20/09

Keywords

  • Multi-core architectures
  • Real-time systems
  • Task migration
  • Timing analysis

ASJC Scopus subject areas

  • Software

Fingerprint

Dive into the research topics of 'Push-assisted migration of real-time tasks in multi-core processors'. Together they form a unique fingerprint.

Cite this