Programmable co-processor for profiling

Craig B. Zilles, Gurindar S. Sohi

Research output: Contribution to conferencePaperpeer-review


Aggressive program optimization requires accurate profile information, but such accuracy requires many samples to be collected. We explore a novel profiling architecture that reduces the overhead of collecting each sample by including a programmable co-processor that analyzes a stream of profile samples generated by a microprocessor. From this stream of samples, the co-processor can detect correlations between instructions (e.g., memory dependence profiling) as well as those between different dynamic instances of the same instruction (e.g., value profiling). The profiler's programmable nature allows a broad range of data to be extracted, post-processed, and formatted, as well as provides the flexibility to tailor the profiling application to the program under test. Because the co-processor is specialized for profiling, it can execute profiling applications more efficiently than a general-purpose processor. The co-processor should not significantly impact the cost or performance of the main processor because it can be implemented using a small number of transistors at the chip's periphery. We demonstrate the proposed design through a detailed evaluation of load value profiling. Our implementation quickly and accurately estimates the value invariance of loads, with time overhead roughly proportional to the size of the instruction working set of the program. This algorithm demonstrates a number of general techniques for profiling, including: estimating the completeness of a profile, a means to focus profiling on particular instructions, management of profiling resources.

Original languageEnglish (US)
Number of pages12
StatePublished - 2001
Externally publishedYes
Event7th International Symposium on High-Performance Computer Architecture - Nuevo Leon, Mex
Duration: Oct 20 2000Oct 24 2000


Other7th International Symposium on High-Performance Computer Architecture
CityNuevo Leon, Mex

ASJC Scopus subject areas

  • Hardware and Architecture


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