Abstract
A processor triggers a first advanced execution processing pass to an instruction sequence in response to a first stalled instruction and initiates execution of a further instruction in the instruction sequence that stalls during the performance of the first advanced execution processing pass. A second advanced execution pass is performed through the instruction sequence in which the further instruction is processed again to provide a valid result after stalling. In one form, the first instruction is performed while the processor operates in a normal execution mode and the first and second advanced execution processing passes are performed while the processor operates in an advance execution mode.
| Original language | English (US) |
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| U.S. patent number | 8266413 |
| Filing date | 3/14/07 |
| State | Published - Sep 11 2012 |