Process integration and optimization of GaAs MESFET and MSM based opto-electronics integrated circuit (OEIC) using statistical experimental design techniques

J. S. Wang, C. C. Teng, J. R. Middleton, Milton Feng

Research output: Contribution to conferencePaperpeer-review

Abstract

This study demonstrates how the design of experiment/response surface modeling, with the combination of experimental data, and data from experimentally calibrated process simulator, can be used to achieve high-performance and high-yield GaAs MESFET-based optoelectronic integrated circuit process. By obtaining the transfer function of each critical process module and representing an IC process as the integration of key process modules, the process optimization can be performed considering both high performance and design for manufacturability (DFM). Furthermore, the mapping of random process variations onto devices variations can be realized by these transfer characteristics, and used for statistical circuit design for manufacturability. Therefore, the process yield can be enhanced on both the process design level and the circuit design level. In addition, process capability can be also be assessed by the process module's transfer characteristics, thus manufacturability can be incorporated in the early stage of the process development.

Original languageEnglish (US)
Pages471-479
Number of pages9
StatePublished - Dec 1 1995
EventProceedings of the 17th IEEE/CPMT International Electronics Manufacturing Technology Symposium - Austin, TX, USA
Duration: Oct 2 1995Oct 4 1995

Other

OtherProceedings of the 17th IEEE/CPMT International Electronics Manufacturing Technology Symposium
CityAustin, TX, USA
Period10/2/9510/4/95

ASJC Scopus subject areas

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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