Process induced stresses in cavity SOI wafers

O. Elkhatib, J. Makinen, M. Palokangas, T. W. Lin, Harley T Johnson, G. P. Horn

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Silicon-on-insulator wafers with buried cavities have been utilized in recent applications ranging from MEMS based resonator devices to double gate MOS devices. The objective of this study is to determine whether the magnitude and orientation of residual stress concentrations generated by the etched silicon cavities, which can introduce reliability issues for these devices, particularly if a large tensile stress results from this processing. The results of this study show that the residual stress state of the bonded wafers may be tensile or compressive and the magnitude and orientation of these stresses depend on both the etched cavity geometry and the oxidation process, which can be verified in the development phase with an infrared polariscope. There is evidence that the stress in the handle wafer prior to bonding is maintained even after high temperature annealing and wafer thinning. Thus, residual stresses may be controllable prior to bonding.

Original languageEnglish (US)
Title of host publicationSemiconductor Wafer Bonding 11
Subtitle of host publicationScience, Technology, and Applications - In Honor of Ulrich Gosele
Pages543-552
Number of pages10
Edition4
DOIs
StatePublished - Dec 1 2010
EventSemiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele - 218th ECS Meeting - Las Vegas, NV, United States
Duration: Oct 10 2010Oct 15 2010

Publication series

NameECS Transactions
Number4
Volume33
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherSemiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele - 218th ECS Meeting
CountryUnited States
CityLas Vegas, NV
Period10/10/1010/15/10

Fingerprint

Residual stresses
Polariscopes
Silicon
MOS devices
Tensile stress
MEMS
Stress concentration
Resonators
Annealing
Infrared radiation
Oxidation
Geometry
Processing
Temperature

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Elkhatib, O., Makinen, J., Palokangas, M., Lin, T. W., Johnson, H. T., & Horn, G. P. (2010). Process induced stresses in cavity SOI wafers. In Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele (4 ed., pp. 543-552). (ECS Transactions; Vol. 33, No. 4). https://doi.org/10.1149/1.3483546

Process induced stresses in cavity SOI wafers. / Elkhatib, O.; Makinen, J.; Palokangas, M.; Lin, T. W.; Johnson, Harley T; Horn, G. P.

Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele. 4. ed. 2010. p. 543-552 (ECS Transactions; Vol. 33, No. 4).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Elkhatib, O, Makinen, J, Palokangas, M, Lin, TW, Johnson, HT & Horn, GP 2010, Process induced stresses in cavity SOI wafers. in Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele. 4 edn, ECS Transactions, no. 4, vol. 33, pp. 543-552, Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele - 218th ECS Meeting, Las Vegas, NV, United States, 10/10/10. https://doi.org/10.1149/1.3483546
Elkhatib O, Makinen J, Palokangas M, Lin TW, Johnson HT, Horn GP. Process induced stresses in cavity SOI wafers. In Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele. 4 ed. 2010. p. 543-552. (ECS Transactions; 4). https://doi.org/10.1149/1.3483546
Elkhatib, O. ; Makinen, J. ; Palokangas, M. ; Lin, T. W. ; Johnson, Harley T ; Horn, G. P. / Process induced stresses in cavity SOI wafers. Semiconductor Wafer Bonding 11: Science, Technology, and Applications - In Honor of Ulrich Gosele. 4. ed. 2010. pp. 543-552 (ECS Transactions; 4).
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