PRISM - a design for scalable shared memory

Ekanadham Kattamuri, Beng Hong Lim, Pratap Pattnaik, Marc Snir

Research output: Contribution to conferencePaper

Abstract

PRISM is a distributed shared-memory architecture that relies on a unified hardware and operating system structure for scalable and reliable performance. It consists of multiple connected shared memory multiprocessors, each controlled by its own kernel. Hardware and software are used to support coherent global shared memory segments, on top of this distributed architecture. PRISM's hardware provides flexible management and dynamic configuration of shared memory pages with different behaviors and supports a number of Simple-COMA cache control operations. PRISM's system structure minimizes the amount of global coordination when managing shared memory. The structure also provides natural fault containment boundaries around each node.

Original languageEnglish (US)
Number of pages1
StatePublished - Dec 1 1997
Externally publishedYes
EventProceedings of the 1997 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems - Maui, HI, USA
Duration: Oct 22 1997Oct 24 1997

Other

OtherProceedings of the 1997 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
CityMaui, HI, USA
Period10/22/9710/24/97

ASJC Scopus subject areas

  • Computer Science(all)

Fingerprint Dive into the research topics of 'PRISM - a design for scalable shared memory'. Together they form a unique fingerprint.

  • Cite this

    Kattamuri, E., Lim, B. H., Pattnaik, P., & Snir, M. (1997). PRISM - a design for scalable shared memory. Paper presented at Proceedings of the 1997 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems, Maui, HI, USA, .