Prediction of ESD protection levels and novel protection devices in thin film SOI technology

Prasun Raha, Jeremy C. Smith, James W. Miller, Elyse Rosenbaum

Research output: Contribution to journalConference articlepeer-review


In this paper we investigate and develop models for Partially-Depleted SOI (PD-SOI) device failure under EOS/ESD stress. The model and experimental data show that due to increased device self-heating, the second-breakdown current per micron width (It2) for salicided PD-SOI MOSFETs with Si film thickness of 100 nm is about 50% of that in their bulk counterparts under HBM-ESD stress pulses. Furthermore, It2 did not scale with device width. Therefore, ESD protection devices with non-silicided S/D diffusions and source-body tied MOSFETs are investigated for improved ESD protection levels. Compact ESD protection networks using the source-body tied device have been shown to achieve HBM-ESD protection levels of ±3.75 kV.

Original languageEnglish (US)
Pages (from-to)356-365
Number of pages10
JournalElectrical Overstress/Electrostatic Discharge Symposium Proceedings
StatePublished - 1997
EventProceedings of the 1997 Electrical Overstress/Electrostatic Discharge Symposium - Santa Clara, CA, USA
Duration: Sep 23 1997Sep 25 1997

ASJC Scopus subject areas

  • Condensed Matter Physics


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