Power delivery for series connected voltage domains in digital circuits

Pradeep S. Shenoy, Igor Fedorov, Tyler Neyens, Philip T Krein

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper discusses a paradigm shift in power delivery which enables low supply voltages for digital circuits methods for connecting the voltage domains in series to enhance system efficiency and performance. Multiple, independent voltage levels enabled by this approach can reduce power consumption dramatically in microprocessor applications. Since voltage regulators only process a fraction of total load power at the intermediate nodes, decreased size and lower conversion losses are attainable. The number of cascaded power conversion stages and the number of power pins can be reduced as the combined load voltage increases, even when individual circuits operate at supply levels far below 1 V. This paper introduces several power delivery architectures for voltage regulation in series connections. A variety of operating conditions are examined in simulation and experimental hardware.

Original languageEnglish (US)
Title of host publication2011 International Conference on Energy Aware Computing, ICEAC 2011
DOIs
StatePublished - 2011
Event2011 International Conference on Energy Aware Computing, ICEAC 2011 - Istanbul, Turkey
Duration: Nov 30 2011 → Dec 2 2011

Other

Other2011 International Conference on Energy Aware Computing, ICEAC 2011
CountryTurkey
CityIstanbul
Period11/30/11 → 12/2/11

Keywords

  • GPU
  • many-core
  • microprocessor loads
  • multi-core
  • power delivery
  • series circuits
  • voltage regulation

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Energy Engineering and Power Technology

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