POSTER: HVISC: A Portable Abstraction for Heterogeneous Parallel Systems

Prakalp Srivastava, Maria Kotsifakou, Matthew D. Sinclair, Rakesh Komuravelli, Vikram Adve, Sarita Adve

Research output: Contribution to journalConference articlepeer-review


Programming heterogeneous parallel systems can be extremely complex because a single system may include multiple different parallelism models, instruction sets, and memory hierarchies, and different systems use different combinations of these features. We propose a carefully designed parallel abstraction of heterogeneous hardware-a hierarchical dataflow graph with shared memory and vector instructions-that is able to capture the parallelism in a wide range of popular parallel hardware. We use this abstraction, which we call hVISC, to define a Virtual Instruction Set Architecture (ISA) that aims to address both functional portability and performance portability across heterogeneous systems. hVISC is more general than existing virtual instruction sets such as PTX, HSAIL and SPIR, e.g., it can capture both streaming parallelism and general dataflow parallelism.

Original languageEnglish (US)
Pages (from-to)443-445
Number of pages3
JournalParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
StatePublished - 2016
Event25th International Conference on Parallel Architectures and Compilation Techniques, PACT 2016 - Haifa, Israel
Duration: Sep 11 2016Sep 15 2016


  • CUDA
  • GPU
  • heterogeneous systems
  • multicore
  • opencl
  • parallel compiler ir
  • ptx
  • virtual instruction set

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture


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