Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology

S. Huang; S. Parthasarathy; Y. Zhou; J. Hajjar; E. Rosenbaum

doi:10.1109/IEDM45741.2023.10413765

Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology

S. Huang, S. Parthasarathy, Y. Zhou, J. Hajjar, E. Rosenbaum

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A low-capacitance, low trigger voltage, and fast turn-on silicon-controlled rectifier (SCR) is developed for electrostatic discharge (ESD) protection of 10 circuits in a FinFET process technology. The SCR includes a deep N-well (DNW) for ground isolation, and a DNW biasing technique is introduced to significantly reduce both the DC current leakage and the parasitic capacitance. The advantages of using poly gates instead of shallow-trench isolation (STI) to separate the anode and cathode of the SCR are characterized through very-fast transmission line (VFTLP) measurements. The proposed SCR device can sink more than 10-A of VFTLP current at 5 V and with less than 80-fF of capacitive loading.

Original language	English (US)
Title of host publication	2023 International Electron Devices Meeting, IEDM 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350327670
DOIs	https://doi.org/10.1109/IEDM45741.2023.10413765
State	Published - 2023
Event	2023 International Electron Devices Meeting, IEDM 2023 - San Francisco, United States Duration: Dec 9 2023 → Dec 13 2023

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Conference

Conference	2023 International Electron Devices Meeting, IEDM 2023
Country/Territory	United States
City	San Francisco
Period	12/9/23 → 12/13/23

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Online availability

10.1109/IEDM45741.2023.10413765

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Cite this

Huang, S., Parthasarathy, S., Zhou, Y., Hajjar, J., & Rosenbaum, E. (2023). Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology. In 2023 International Electron Devices Meeting, IEDM 2023 (Technical Digest - International Electron Devices Meeting, IEDM). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM45741.2023.10413765

Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology. / Huang, S.; Parthasarathy, S.; Zhou, Y. et al.
2023 International Electron Devices Meeting, IEDM 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Huang, S, Parthasarathy, S, Zhou, Y, Hajjar, J & Rosenbaum, E 2023, Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology. in 2023 International Electron Devices Meeting, IEDM 2023. Technical Digest - International Electron Devices Meeting, IEDM, Institute of Electrical and Electronics Engineers Inc., 2023 International Electron Devices Meeting, IEDM 2023, San Francisco, United States, 12/9/23. https://doi.org/10.1109/IEDM45741.2023.10413765

@inproceedings{9f55b96e9f1044cb965bb1753a7a8e62,

title = "Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology",

abstract = "A low-capacitance, low trigger voltage, and fast turn-on silicon-controlled rectifier (SCR) is developed for electrostatic discharge (ESD) protection of 10 circuits in a FinFET process technology. The SCR includes a deep N-well (DNW) for ground isolation, and a DNW biasing technique is introduced to significantly reduce both the DC current leakage and the parasitic capacitance. The advantages of using poly gates instead of shallow-trench isolation (STI) to separate the anode and cathode of the SCR are characterized through very-fast transmission line (VFTLP) measurements. The proposed SCR device can sink more than 10-A of VFTLP current at 5 V and with less than 80-fF of capacitive loading.",

author = "S. Huang and S. Parthasarathy and Y. Zhou and J. Hajjar and E. Rosenbaum",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 2023 International Electron Devices Meeting, IEDM 2023 ; Conference date: 09-12-2023 Through 13-12-2023",

year = "2023",

doi = "10.1109/IEDM45741.2023.10413765",

language = "English (US)",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2023 International Electron Devices Meeting, IEDM 2023",

address = "United States",

}

TY - GEN

T1 - Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology

AU - Huang, S.

AU - Parthasarathy, S.

AU - Zhou, Y.

AU - Hajjar, J.

AU - Rosenbaum, E.

PY - 2023

Y1 - 2023

N2 - A low-capacitance, low trigger voltage, and fast turn-on silicon-controlled rectifier (SCR) is developed for electrostatic discharge (ESD) protection of 10 circuits in a FinFET process technology. The SCR includes a deep N-well (DNW) for ground isolation, and a DNW biasing technique is introduced to significantly reduce both the DC current leakage and the parasitic capacitance. The advantages of using poly gates instead of shallow-trench isolation (STI) to separate the anode and cathode of the SCR are characterized through very-fast transmission line (VFTLP) measurements. The proposed SCR device can sink more than 10-A of VFTLP current at 5 V and with less than 80-fF of capacitive loading.

AB - A low-capacitance, low trigger voltage, and fast turn-on silicon-controlled rectifier (SCR) is developed for electrostatic discharge (ESD) protection of 10 circuits in a FinFET process technology. The SCR includes a deep N-well (DNW) for ground isolation, and a DNW biasing technique is introduced to significantly reduce both the DC current leakage and the parasitic capacitance. The advantages of using poly gates instead of shallow-trench isolation (STI) to separate the anode and cathode of the SCR are characterized through very-fast transmission line (VFTLP) measurements. The proposed SCR device can sink more than 10-A of VFTLP current at 5 V and with less than 80-fF of capacitive loading.

UR - http://www.scopus.com/inward/record.url?scp=85185571221&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85185571221&partnerID=8YFLogxK

U2 - 10.1109/IEDM45741.2023.10413765

DO - 10.1109/IEDM45741.2023.10413765

M3 - Conference contribution

AN - SCOPUS:85185571221

T3 - Technical Digest - International Electron Devices Meeting, IEDM

BT - 2023 International Electron Devices Meeting, IEDM 2023

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2023 International Electron Devices Meeting, IEDM 2023

Y2 - 9 December 2023 through 13 December 2023

ER -

Poly-Bounded Silicon-Controlled-Rectifier for ESD Protection in FinFET Technology

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