Planar VLS grown GaAs nanowire array based HEMTs

Xin Miao, Xiuling Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In order to suppress short channel effects as gate length of field effect transistors (FETs) continues to downscale, multi-gate FETs and nanowire FETs (NW-FETs) are poised to replace traditional planar devices. Top-down defined NW-FETs are susceptible to etching damages and the size of which is limited by lithography. Bottom-up self-assembled III-V NWs are particularly interesting because of the simplicity in processing which doesn't require lithography and chemical etching, potentially smaller feature sizes than defined by lithography and inherent high carrier mobility. However, there are three main challenges of realizing bottom-up grown NW-FET based circuits including: controllability of NW growth direction and positioning; uniformity of NW electrical property; and compatibility with planar processing.

Original languageEnglish (US)
Title of host publication2011 International Semiconductor Device Research Symposium, ISDRS 2011
DOIs
StatePublished - Dec 1 2011
Event2011 International Semiconductor Device Research Symposium, ISDRS 2011 - College Park, MD, United States
Duration: Dec 7 2011Dec 9 2011

Publication series

Name2011 International Semiconductor Device Research Symposium, ISDRS 2011

Other

Other2011 International Semiconductor Device Research Symposium, ISDRS 2011
CountryUnited States
CityCollege Park, MD
Period12/7/1112/9/11

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Miao, X., & Li, X. (2011). Planar VLS grown GaAs nanowire array based HEMTs. In 2011 International Semiconductor Device Research Symposium, ISDRS 2011 [6135169] (2011 International Semiconductor Device Research Symposium, ISDRS 2011). https://doi.org/10.1109/ISDRS.2011.6135169