TY - GEN
T1 - Phonon limited transport in graphene pseudospintronic devices
AU - Estrada, Z. J.
AU - Dellabetta, B.
AU - Ravaioli, U.
AU - Gilbert, M. J.
PY - 2012
Y1 - 2012
N2 - Graphene pseudospin (G-PsS) devices have the potential to far outperform traditional CMOS devices. This is due to a predicted room temperature phase transition from Fermi liquid to Bose-Einstein condensate in double layer graphene [1]. The condensate is formed when electrons and holes in residing in opposite graphene layers bind into excitons as a result of strong interlayer Coulomb interactions. This device is expected to exhibit interlayer superfluidity, which allows for large interlayer currents at correspondingly low interlayer bias voltages. As G-PsS device are expected to operate at room temperature, it is important to understand how the electron-phonon interaction (EPI) affects device performance.
AB - Graphene pseudospin (G-PsS) devices have the potential to far outperform traditional CMOS devices. This is due to a predicted room temperature phase transition from Fermi liquid to Bose-Einstein condensate in double layer graphene [1]. The condensate is formed when electrons and holes in residing in opposite graphene layers bind into excitons as a result of strong interlayer Coulomb interactions. This device is expected to exhibit interlayer superfluidity, which allows for large interlayer currents at correspondingly low interlayer bias voltages. As G-PsS device are expected to operate at room temperature, it is important to understand how the electron-phonon interaction (EPI) affects device performance.
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U2 - 10.1109/DRC.2012.6256952
DO - 10.1109/DRC.2012.6256952
M3 - Conference contribution
AN - SCOPUS:84866922029
SN - 9781467311618
T3 - Device Research Conference - Conference Digest, DRC
SP - 87
EP - 88
BT - 70th Device Research Conference, DRC 2012 - Conference Digest
T2 - 70th Device Research Conference, DRC 2012
Y2 - 18 June 2012 through 20 June 2012
ER -