Periodic steady-state analysis augmented with design equality constraints

Igor Vytyaz, Pavan Kumar Hanumolu, Un Ku Moon, Kartikeya Mayaram

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A design-oriented periodic steady-state analysis is presented in this paper. The new analysis finds the values of circuit parameters that result in a desired circuit performance specified by a set of equality constraints. This is done by including the design equality constraints and the circuit parameters directly in the steady-state analysis as additional equations and unknowns. A time-domain finite difference method and the numerical implementation for the proposed analysis are described. Several examples demonstrate that the new analysis accurately and efficiently tunes circuit parameters that conform to a wide range of design specifications.

Original languageEnglish (US)
Title of host publicationDesign, Automation and Test in Europe, DATE 2008
Pages312-317
Number of pages6
DOIs
StatePublished - Aug 25 2008
Externally publishedYes
EventDesign, Automation and Test in Europe, DATE 2008 - Munich, Germany
Duration: Mar 10 2008Mar 14 2008

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

OtherDesign, Automation and Test in Europe, DATE 2008
CountryGermany
CityMunich
Period3/10/083/14/08

ASJC Scopus subject areas

  • Engineering(all)

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