Abstract

A method is presented for modeling the behavior of a given class of applications executing in real workloads on a particular machine. The methodology is illustrated by modeling the execution of computationally bound, parallel applications running in real workloads on an Alliant FX/80. The model is constructed from real measured data obtained during normal machine operation and can capture intricate multiple job interactions, such as contention for shared resources. The model is a finite-state, discrete-time Markov model with rewards and costs associated with each state. The model can predict the distribution of completion times in real workloads for a given application. The predictions are useful in gauging how quickly an application will execute, or in predicting the effects of a system change on performance. The model is validated with three separate sets of empirical data. In one validation, the model successfully predicts the effects of operating the machine with one less processor.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual Symposium on Computer Architecture
PublisherPubl by IEEE
Pages190-199
Number of pages10
ISBN (Print)0897913949
StatePublished - May 1 1991
EventProceedings of the 18th International Symposium on Computer Architecture - Toronto, Ont, Can
Duration: May 27 1991May 30 1991

Publication series

NameConference Proceedings - Annual Symposium on Computer Architecture
ISSN (Print)0149-7111

Other

OtherProceedings of the 18th International Symposium on Computer Architecture
CityToronto, Ont, Can
Period5/27/915/30/91

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'Performance prediction tuning on a multiprocessor'. Together they form a unique fingerprint.

  • Cite this

    Dimpsey, R. T., & Iyer, R. K. (1991). Performance prediction tuning on a multiprocessor. In Conference Proceedings - Annual Symposium on Computer Architecture (pp. 190-199). (Conference Proceedings - Annual Symposium on Computer Architecture). Publ by IEEE.