Performance evaluation considering mask misalignment in multiple patterning decomposition

Haitong Tian, Martin D.F. Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the technology advances to 14/10 nm technology nodes and beyond, multiple patterning lithography (MPL) is no longer an option but a necessity. For advanced technology nodes, process variations have significant influences on the quality of fabricated circuits, and often lead to unexpected power/timing degenerations. For example, a 6 nm misalignment causes a 15% error in coupling capacitance and a 5% error on total capacitance, whereas a 2 nm displacement creates approximately a 5% error for coupling capacitance and 2% error for total capacitance [1]. Mask misalignment would increase the coupling capacitance for a given layout and further complicate the way of simulating timing closure. In this paper, we studied the coupling capacitance variations due to mask misalignment in MPL, and mathematically proved that worst case coupling capacitance scenarios for all MPL decompositions. Our algorithm is able to identify a decomposition with a tight upper bound on the worst case coupling capacitance, which can be used in timing/power analysis. Our approach is expected to help the engineers to quickly evaluate the quality of different decompositions, and better understand the pros and cons brought by MPL decompositions.

Original languageEnglish (US)
Title of host publicationProceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016
PublisherIEEE Computer Society
Pages192-197
Number of pages6
ISBN (Electronic)9781509012138
DOIs
StatePublished - May 25 2016
Event17th International Symposium on Quality Electronic Design, ISQED 2016 - Santa Clara, United States
Duration: Mar 15 2016Mar 16 2016

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2016-May
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other17th International Symposium on Quality Electronic Design, ISQED 2016
CountryUnited States
CitySanta Clara
Period3/15/163/16/16

Keywords

  • Coupling Capacitance
  • Mask Misalignment
  • Triple Patterning Lithography

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Tian, H., & Wong, M. D. F. (2016). Performance evaluation considering mask misalignment in multiple patterning decomposition. In Proceedings of the 17th International Symposium on Quality Electronic Design, ISQED 2016 (pp. 192-197). [7479199] (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2016-May). IEEE Computer Society. https://doi.org/10.1109/ISQED.2016.7479199