In this paper, we examine the performance characteristics of bilayer graphene pseudospin devices as we scale the layer width of the monolayers of graphene which comprise the bilayer structure. We find that, for layer widths of 30 nm, the device performance can exceed analytical predictions due to thermal smoothing of the interlayer interactions. However, when the device is further scaled to 20 nm and below, we find an appreciable drop of the maximum current the device can sustain when compared with the predicted values which result from increased quantum interference between injected quasi-particles and those reflected off of the excitonic gap opened at the Fermi energy. These results provide important insight into the maximum achievable performance characteristics and optimal device-design parameters for this promising potential post-CMOS logic device.
- Beyond complementary metaloxidesemiconductor (CMOS)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering