Parametric timing analysis and its application to dynamic voltage scaling

Sibin Mohan, Frank Mueller, Michael Root, William Hawkins, Christopher Healy, David Whalley, Emilio Vivancos

Research output: Contribution to journalArticlepeer-review

Abstract

Embedded systems with real-time constraints depend on a priori knowledge ofworst-case execution times (WCETs) to determine if tasks meet deadlines. Static timing analysis derives bounds on WCETs but requires statically known loop bounds. This work removes the constraint on known loop bounds through parametric analysis expressing WCETs as functions. Tighter WCETs are dynamically discovered to exploit slack by dynamic voltage scaling (DVS) saving 60% to 82% energy over DVS-oblivious techniques and showing savings close to more costly dynamic-priority DVS algorithms. Overall, parametric analysis expands the class of real-time applications to programs with loopinvariant dynamic loop bounds while retaining tight WCET bounds.

Original languageEnglish (US)
Article number25
JournalTransactions on Embedded Computing Systems
Volume10
Issue number2
DOIs
StatePublished - Dec 2010
Externally publishedYes

Keywords

  • Dynamic voltage scaling
  • Real-time systems
  • Timing analysis
  • Worst-case execution time

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

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