Parallelization of the reduced-coupling technique for a method-of-moments-based field solver used for product-level wide data-bus analysis

A. J. Hesford, J. D. Morsey, W. C. Chew, A. Deutsch, H. H. Smith

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A parallel LU decomposition algorithm is presented to take advantage of the sparse impedance matrix produced by the reduced-coupling method. This algorithm allows rapid simulation of very large chip and packaging problems. A representative example is shown for a wide, on-chip data-bus that required one million surface unknowns and the computational power of a 1024-node IBM BlueGene cluster with distributed memory.

Original languageEnglish (US)
Title of host publicationIEEE 16th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
Pages337-342
Number of pages6
DOIs
StatePublished - Dec 1 2007
EventIEEE 16th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP - Atlanta, GA, United States
Duration: Oct 29 2007Oct 31 2007

Publication series

NameIEEE Topical Meeting on Electrical Performance of Electronic Packaging

Other

OtherIEEE 16th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
Country/TerritoryUnited States
CityAtlanta, GA
Period10/29/0710/31/07

ASJC Scopus subject areas

  • Engineering(all)

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