Pacman: Tolerating asymmetric data races with unintrusive hardware

Shanxiang Qi, Norimasa Otsuki, Lois Orosa Nogueira, Abdullah Muzahid, Josep Torrellas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Data races are a major contributor to parallel software unreliability. A type of race that is both common and typically harmful is the Asymmetric data race. It occurs when at least one of the racing threads is inside a critical section. Current proposals that target them are software-based. They slow down execution and require significant compiler, operating system (OS), or application changes. This paper proposes the first scheme to tolerate asymmetric data races in production runs with negligible execution overhead. The scheme, called Pacman, exploits cache coherence hardware to temporarily protect the variables that a thread accesses in a critical section from other threads' requests. Unlike previous schemes, Pacman induces negligible slowdown, needs no support from the compiler or (in the baseline design) from the OS, and requires no application source code changes. In addition, its hardware is relatively unintrusive. We test Pacman with the SPLASH-2, PARSEC, Sphinx 3, and Apache codes, and discover two unreported asymmetric data races.

Original languageEnglish (US)
Title of host publicationProceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012
Pages349-360
Number of pages12
DOIs
StatePublished - 2012
Event18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012 - New Orleans, LA, United States
Duration: Feb 25 2012Feb 29 2012

Publication series

NameProceedings - International Symposium on High-Performance Computer Architecture
ISSN (Print)1530-0897

Other

Other18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012
CountryUnited States
CityNew Orleans, LA
Period2/25/122/29/12

ASJC Scopus subject areas

  • Hardware and Architecture

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