Overcoming the power wall by exploiting inexactness and emerging COTS architectural features: Trading precision for improving application quality

Mike Fagan, Jeremy Schlachter, Kazutomo Yoshii, Sven Leyffer, Krishna Palem, Marc Snir, Stefan M. Wild, Christian Enz

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Energy and power consumption are major limitations to continued scaling of computing systems. Inexactness where the quality of the solution can be traded for energy savings has been proposed as a counterintuitive approach to overcoming those limitation. However, in the past, inexactness has been necessitated the need for highly customized or specialized hardware. In order to move away from customization, in earlier work [1], it was shown that by interpreting precision in the computation to be the parameter to trade to achieve inexactness, weather prediction and page rank could both benefit in terms of yielding energy savings through reduced precision, while preserving the quality of the application. However, this required representations of numbers that were not readily available on commercial off-the-shelf (COTS) processors. In this paper, we provide opportunities for extending the notion of trading precision for energy savings into the world COTS. We provide a model and analyze the opportunities and behavior of all three IEEE compliant precision values available on COTS processors: (i) double (ii) single, and (iii) half. Through measurements, we show through a limit study energy savings in going from double precision to half precision are a factor of 3.98.

Original languageEnglish (US)
Title of host publicationProceedings - 29th IEEE International System on Chip Conference, SOCC 2016
EditorsKaran Bhatia, Massimo Alioto, Danella Zhao, Andrew Marshall, Ramalingam Sridhar
PublisherIEEE Computer Society
Pages241-246
Number of pages6
ISBN (Electronic)9781509013661
DOIs
StatePublished - Jul 2 2016
Externally publishedYes
Event29th IEEE International System on Chip Conference, SOCC 2016 - Seattle, United States
Duration: Sep 6 2016Sep 9 2016

Publication series

NameInternational System on Chip Conference
Volume0
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706

Other

Other29th IEEE International System on Chip Conference, SOCC 2016
CountryUnited States
CitySeattle
Period9/6/169/9/16

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Overcoming the power wall by exploiting inexactness and emerging COTS architectural features: Trading precision for improving application quality'. Together they form a unique fingerprint.

  • Cite this

    Fagan, M., Schlachter, J., Yoshii, K., Leyffer, S., Palem, K., Snir, M., Wild, S. M., & Enz, C. (2016). Overcoming the power wall by exploiting inexactness and emerging COTS architectural features: Trading precision for improving application quality. In K. Bhatia, M. Alioto, D. Zhao, A. Marshall, & R. Sridhar (Eds.), Proceedings - 29th IEEE International System on Chip Conference, SOCC 2016 (pp. 241-246). [7905477] (International System on Chip Conference; Vol. 0). IEEE Computer Society. https://doi.org/10.1109/SOCC.2016.7905477