Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture

Janani Mukundan, Saugata Ghose, Robert Karmazin, Engin Ipek, José F. Martínez

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Though the prime target of multicore architectures is parallel and multithreaded workloads (which favors maximum core count), executing sequential code fast continues to remain critical (which benefits from maximum core size). This poses a difficult design tradeoff. Core Fusion is a recently-proposed reconfigurable multicore architecture that attempts to circumvent this compromise by "fusing" groups of fundamentally independent cores into larger, more aggressive processors dynamically as needed. In this way, it accommodates highly parallel, partially parallel, multiprogrammed, and sequential codes with ease. However, the sequential performance of the original fused configuration falls quite short of an area-equivalent, monolithic, out-of-order processor. This paper effectively eliminates the fusion deficit for sequential codes by attacking two major sources of inefficiency: collective commit and instruction steering. We demonstrate in detail that these modifications allow Core Fusion to essentially match the performance of an area-equivalent monolithic out-of-order processor. The implication is that the inclusion of wide-issue cores in future multicore designs may be unnecessary.

Original languageEnglish (US)
Title of host publicationICS'12 - Proceedings of the 2012 ACM International Conference on Supercomputing
Number of pages10
StatePublished - 2012
Externally publishedYes
Event26th ACM International Conference on Supercomputing, ICS'12 - San Servolo Island, Venice, Italy
Duration: Jun 25 2012Jun 29 2012

Publication series

NameProceedings of the International Conference on Supercomputing


Conference26th ACM International Conference on Supercomputing, ICS'12
CitySan Servolo Island, Venice


  • Collective commit
  • Core Fusion
  • Genetic programming
  • Instruction steering
  • Microarchitecture
  • Multicore
  • Software diversity

ASJC Scopus subject areas

  • Computer Science(all)


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