Abstract
Monolithic integration of III–V nanowires on silicon platforms has been regarded as a promising building block for many on-chip optoelectronic, nanophotonic, and electronic applications. Although great advances have been made from fundamental material engineering to realizing functional devices, one of the remaining challenges for on-chip applications is that the growth direction of nanowires on Si(001) substrates is difficult to control. Here, catalyst-free selective-area epitaxy of nanowires on (001)-oriented silicon-on-insulator (SOI) substrates with the nanowires aligned to desired directions is proposed and demonstrated. This is enabled by exposing {111} planes on (001) substrates using wet chemical etching, followed by growing nanowires on the exposed planes. The formation of nanowire array-based bottom-up photonic crystal cavities on SOI(001) and their coupling to silicon waveguides and grating couplers, which support the feasibility for on-chip photonic applications are demonstrated. The proposed method of integrating position- and orientation-controllable nanowires on Si(001) provides a new degree of freedom in combining functional and ultracompact III–V devices with mature silicon platforms.
Original language | English (US) |
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Article number | 2002220 |
Journal | Advanced Functional Materials |
Volume | 30 |
Issue number | 30 |
Early online date | Jun 2 2020 |
DOIs | |
State | Published - Jul 1 2020 |
Externally published | Yes |
Keywords
- III–V on silicon
- monolithic integration
- nanowires
- photonic crystals
- silicon photonics
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- General Chemistry
- Biomaterials
- General Materials Science
- Condensed Matter Physics
- Electrochemistry