Optimizing the performance of parallel applications on a 5D torus via task mapping

Abhinav Bhatele, Nikhil Jain, Katherine E. Isaacs, Ronak Buch, Todd Gamblin, Steven H. Langer, Laxmikant V. Kale

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Six of the ten fastest supercomputers in the world in 2014 use a torus interconnection network for message passing between compute nodes. Torus networks provide high bandwidth links to near-neighbors and low latencies over multiple hops on the network. However, large diameters of such networks necessitate a careful placement of parallel tasks on the compute nodes to minimize network congestion. This paper presents a methodological study of optimizing application performance on a five-dimensional torus network via the technique of topology-aware task mapping. Task mapping refers to the placement of processes on compute nodes while carefully considering the network topology between the nodes and the communication behavior of the application. We focus on the IBM Blue Gene/Q machine and two production applications - a laser-plasma interaction code called pF3D and a lattice QCD application called MILC. Optimizations presented in the paper improve the communication performance of pF3D by 90% and that of MILC by up to 47%.

Original languageEnglish (US)
Title of host publication2014 21st International Conference on High Performance Computing, HiPC 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479959761
DOIs
StatePublished - Jan 1 2014
Event2014 21st International Conference on High Performance Computing, HiPC 2014 - Goa, India
Duration: Dec 17 2014Dec 20 2014

Publication series

Name2014 21st International Conference on High Performance Computing, HiPC 2014

Other

Other2014 21st International Conference on High Performance Computing, HiPC 2014
CountryIndia
CityGoa
Period12/17/1412/20/14

Keywords

  • 5D torus
  • congestion
  • performance
  • task mapping

ASJC Scopus subject areas

  • Computer Science (miscellaneous)
  • Hardware and Architecture
  • Software

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  • Cite this

    Bhatele, A., Jain, N., Isaacs, K. E., Buch, R., Gamblin, T., Langer, S. H., & Kale, L. V. (2014). Optimizing the performance of parallel applications on a 5D torus via task mapping. In 2014 21st International Conference on High Performance Computing, HiPC 2014 [7116706] (2014 21st International Conference on High Performance Computing, HiPC 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HiPC.2014.7116706