Optimizing sparse data structures for matrix-vector multiply

D. Guo, W. Gropp

Research output: Contribution to journalArticlepeer-review

Abstract

Sparse matrix-vector multiply is an important operation in a wide range of problems. One of the key factors determining the performance of this operation is sustained memory bandwidth. In the IBM POWER architecture, there is a hardware component called a prefetch data stream that can significantly increase sustained memory bandwidth. We have developed a new family of storage formats for sparse matrices that exploits this capability. Test results show that our new streamed storage formats can significantly improve the performance of sparse matrix and vector multiply on IBM POWER processors, compared to traditional compressed sparse row and block compressed sparse row formats. The new formats also provide a benefit on x86 processors.

Original languageEnglish (US)
Pages (from-to)115-131
Number of pages17
JournalInternational Journal of High Performance Computing Applications
Volume25
Issue number1
DOIs
StatePublished - Feb 1 2011

Keywords

  • data stream
  • prefetch
  • sparse matrix vector multiply
  • streamed blocked compressed row storage format
  • streamed compressed row storage format

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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