Optimizing memory affinity with a hybrid compiler/OS approach

Matthias Diener, Eduardo H.M. Cruz, Marco A.Z. Alves, Edson Borin, Philippe O.A. Navaux

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Optimizing the memory access behavior is an important challenge to improve the performance and energy consumption of parallel applications on shared memory architectures. Modern systems contain complex memory hierarchies with multiple memory controllers and several levels of caches. In such machines, analyzing the affinity between threads and data to map them to the hardware hierarchy reduces the cost of memory accesses. In this paper, we introduce a hybrid technique to optimize the memory access behavior of parallel applications. It is based on a compiler optimization that inserts code to predict, at runtime, the memory access behavior of the application and an OS mechanism that uses this information to optimize the mapping of threads and data. In contrast to previous work, our proposal uses a proactive technique to improve the future memory access behavior using predictions instead of the past behavior. Our mechanism achieves substantial performance gains for a variety of parallel applications.

Original languageEnglish (US)
Title of host publicationACM International Conference on Computing Frontiers 2017, CF 2017
PublisherAssociation for Computing Machinery
Pages221-229
Number of pages9
ISBN (Electronic)9781450344876
DOIs
StatePublished - May 15 2017
Externally publishedYes
Event14th ACM International Conference on Computing Frontiers, CF 2017 - Siena, Italy
Duration: May 15 2017May 17 2017

Publication series

NameACM International Conference on Computing Frontiers 2017, CF 2017

Conference

Conference14th ACM International Conference on Computing Frontiers, CF 2017
Country/TerritoryItaly
CitySiena
Period5/15/175/17/17

Keywords

  • Data mapping
  • Memory affinity
  • NUMA
  • Thread mapping

ASJC Scopus subject areas

  • General Computer Science

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