Optimization of SCR for High-Speed Digital and RF Applications in 45-nm SOI CMOS Technology

Shudong Huang, Srivatsan Parthasarathy, Yuanzhong Paul Zhou, Jean Jacques Hajjar, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work presents a low-leakage silicon-controlled-rectifier (SCR) for ESD protection in a 45-nm PDSOI CMOS technology. The newly proposed trigger circuit utilizes a gate-coupled NMOS to provide a low trigger voltage, making the SCR suitable for gate oxide protection. Reverse body bias is used to achieve a low DC leakage current. The anode-cathode spacing of the SCR is optimized to provide a low overshoot voltage while avoiding punchthrough. the optimized SCR shows up to 50% improvement in voltage overshoot during very fast transients on the CDM timescale.

Original languageEnglish (US)
Title of host publication2023 IEEE International Reliability Physics Symposium, IRPS 2023 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665456722
DOIs
StatePublished - 2023
Externally publishedYes
Event61st IEEE International Reliability Physics Symposium, IRPS 2023 - Monterey, United States
Duration: Mar 26 2023Mar 30 2023

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2023-March
ISSN (Print)1541-7026

Conference

Conference61st IEEE International Reliability Physics Symposium, IRPS 2023
Country/TerritoryUnited States
CityMonterey
Period3/26/233/30/23

Keywords

  • CMOS
  • SCR
  • SOI
  • electrostatic discharge

ASJC Scopus subject areas

  • General Engineering

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