Optimization of Electrodeposited Copper for Sub 5 μm L/S Redistribution Layer Lines by Plating Additives

Ralf Schmidt, T. Beck, R. Rooney, A. Gewirth

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Decreasing dimensions of copper conductor lines in redistribution layers of upcoming fan-out wafer-level packages involve increasing demands in terms of reliability. Due to the different thermal expansion of the different materials of the package, the lines suffer from high mechanical stress. This stress may ultimately lead to failure of the conductor. The corresponding failure mode was found to be transgranular brittle fracture along the grain boundaries of the copper. Literature studies revealed, that sulfur and chloride impurities in the deposit accumulate at the grain boundaries and render them brittle. In addition, impurity-driven accumulation of voids during annealing was found, which further weakens the grain boundaries. Such weakening of the grain boundaries was combined with a literature known transition from plastic to brittle deformation as a function of the ratio of the grain size versus the deposit thickness. As a conclusion, deposits of high purity and large grain size are required to improve the reliability of the thin copper lines. Both parameters may be affected by properly designed plating additives. Guidelines for the design of suitable levelers require in-depth knowledge of the effect of functional groups on the plating process and may be obtained based on spectroscopy and electrochemistry. Impurity analysis of deposits obtained from a plating process based on a leveler, which was synthesized according to the provided guidelines, indeed yielded copper of high purity. Such process is supposed to be well-suitable for upcoming fine-pitch redistribution layer lines.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE 68th Electronic Components and Technology Conference, ECTC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages6
ISBN (Print)9781538649985
StatePublished - Aug 7 2018
Event68th IEEE Electronic Components and Technology Conference, ECTC 2018 - San Diego, United States
Duration: May 29 2018Jun 1 2018

Publication series

NameProceedings - Electronic Components and Technology Conference
ISSN (Print)0569-5503


Other68th IEEE Electronic Components and Technology Conference, ECTC 2018
Country/TerritoryUnited States
CitySan Diego


  • Additives
  • Advanced packaging
  • Copper
  • Electrodeposition
  • Fan-out wafer level packaging
  • Redistribution layer
  • Reliability

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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