Optimal simultaneous mapping and clustering for FPGA delay optimization

Keyphrases

• Delay Model 100%
• Delay Optimization 100%
• Performance Gain 50%
• Optimal Algorithm 50%
• Two-step Approach 50%
• Mapping Algorithm 50%
• Power Dissipation 50%
• Clustering Algorithm 50%
• FPGA Design Flow 50%
• Area Overhead 50%
• Circuit Performance 50%
• Technology Mapping 50%
• Initial Mapping 50%
• FPGA Design 50%
• Circuit Power 50%
• Delay Optimal 50%
• Synthesis Flow 50%
• Performance Areas 50%
• Circuit Area 50%

Computer Science

• Field Programmable Gate Arrays 100%
• Optimal Algorithm 33%
• Performance Gain 33%
• Clustering Algorithm 33%
• Mapping Algorithm 33%
• Technology Mapping 33%
• Energy Dissipation 33%