Optimal orientations of transistor chains

T. W. Her, D. F. Wong, T. H. Freeman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A description is given of an O(NL + L log L) time algorithm, where N is the total number of transistor chains and L is the channel length, to determine the orientation of each transistor chain such that the channel density is minimized. It is shown that the problem of flipping chains and subchains to minimize channel density can also be solved optimally. Finally, it is observed that the algorithm can be used to optimally solve a generalized channel routing problem. They have implemented their algorithm in the custom cell synthesis system of the MCC Physical Satellite. For the cells selected from industry, the algorithm reduced channel density by 18%. They also tested the algorithm on several channel routing problems and reductions of up to 30% in channel density were obtained.

Original languageEnglish (US)
Title of host publication1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers
PublisherPubl by IEEE
Pages524-527
Number of pages4
ISBN (Print)0818620552
StatePublished - Dec 1 1990
Externally publishedYes
Event1990 IEEE International Conference on Computer-Aided Design - ICCAD-90 - Santa Clara, CA, USA
Duration: Nov 11 1990Nov 15 1990

Publication series

Name1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers

Other

Other1990 IEEE International Conference on Computer-Aided Design - ICCAD-90
CitySanta Clara, CA, USA
Period11/11/9011/15/90

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Her, T. W., Wong, D. F., & Freeman, T. H. (1990). Optimal orientations of transistor chains. In 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (pp. 524-527). (1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers). Publ by IEEE.