Abstract
This paper addresses the problem of circuit clustering for delay minimization, subject to capacity constraints. We use the general delay model, for which only heuristic solutions were unknown. We present an optimal polynomial time algorithm for combinational circuits under this model. Our algorithm can be generalized to solve the problem under any monotone clustering constraint.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - Design Automation Conference |
| Publisher | Publ by IEEE |
| Pages | 309-314 |
| Number of pages | 6 |
| ISBN (Print) | 0897915771, 9780897915779 |
| DOIs | |
| State | Published - Jan 1 1993 |
| Event | Proceedings of the 30th ACM/IEEE Design Automation Conference - Dallas, TX, USA Duration: Jun 14 1993 → Jun 18 1993 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| ISSN (Print) | 0146-7123 |
Other
| Other | Proceedings of the 30th ACM/IEEE Design Automation Conference |
|---|---|
| City | Dallas, TX, USA |
| Period | 6/14/93 → 6/18/93 |
ASJC Scopus subject areas
- Engineering(all)
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Cite this
Rajaraman, R., & Wong, D. F. (1993). Optimal clustering for delay minimization. In Proceedings - Design Automation Conference (pp. 309-314). (Proceedings - Design Automation Conference). Publ by IEEE. https://doi.org/10.1145/157485.164907