Online sharing-aware thread mapping in software transactional memory

Douglas Pereira Pasqualin, Matthias Diener, Andre Rauber Du Bois, Mauricio Lima Pilla

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Software Transactional Memory (STM) is an alternative abstraction to synchronize processes in parallel programming. One advantage is simplicity since it is possible to replace the use of explicit locks with atomic blocks. Regarding STM performance, many studies already have been made focusing on reducing the number of aborts. However, in current multicore architectures with complex memory hierarchies, it is also important to consider where the memory of a program is allocated and how it is accessed. This paper proposes the use of a technique called sharing-aware mapping, which maps threads to cores of an application based on their memory access behavior, to achieve better performance in STM systems. We introduce STMap, an online, low overhead mechanism to detect the sharing behavior and perform the mapping directly inside the STM library, by tracking and analyzing how threads perform STM operations. In experiments with the STAMP benchmark suite and synthetic benchmarks, STMap shows performance gains of up to 77% on a Xeon system (17.5% on average) and 85% on an Opteron system (9.1% on average), compared to the Linux scheduler.

Original languageEnglish (US)
Title of host publicationProceedings - 2020 IEEE 32nd International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2020
PublisherIEEE Computer Society
Pages35-42
Number of pages8
ISBN (Electronic)9781728199245
DOIs
StatePublished - Sep 2020
Event32nd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2020 - Virtual, Porto, Portugal
Duration: Sep 8 2020Sep 11 2020

Publication series

NameProceedings - Symposium on Computer Architecture and High Performance Computing
Volume2020-September
ISSN (Print)1550-6533

Conference

Conference32nd IEEE International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2020
Country/TerritoryPortugal
CityVirtual, Porto
Period9/8/209/11/20

Keywords

  • Multicore
  • Sharing-aware
  • Software Transactional Memory
  • Thread Mapping

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

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