Online estimation of architectural vulnerability factor for soft errors

Xiaodong Li, Sarita V Adve, Pradip Bose, Jude A. Rivers

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior research has shown that there is significant architecture-level masking, and many soft error solutions take advantage of this effect. Prior work has also shown that the degree of such masking can vary significantly across workloads and between individual workload phases, motivating dynamic adaptation of reliability solutions for optimal cost and benefit. For such adaptation, it is important to be able to accurately estimate the amount of masking or the architecture vulnerability factor (AVF) online, while the program is running. Unfortunately, existing solutions for estimating AVF are often based on offline simulators and hard to implement in real processors. This paper proposes a novel way of estimating AVF on-line, using simple modifications to the processor. The estimation method applies to both logic and storage structures on the processor. Compared to previous methods for estimating AVF, our method does not require any offline simulation or calibration for different workloads. We tested our method with a widely used simulator from industry, for four processor structures and for 100 to 200 intervals of each of eleven SPEC benchmarks. The results show that our method provides acceptably accurate AVF estimates at runtime. The absolute error rarely exceeds 0.08 across all application intervals for all structures, and the mean absolute error for a given application and structure combination is always within 0.05.

Original languageEnglish (US)
Title of host publicationISCA 2008, Proceedings - 35th International Symposium on Computer Architecture
Pages341-352
Number of pages12
DOIs
StatePublished - Oct 1 2008
EventISCA 2008, 35th International Symposium on Computer Architecture - Beijing, China
Duration: Jun 21 2008Jun 25 2008

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897

Other

OtherISCA 2008, 35th International Symposium on Computer Architecture
CountryChina
CityBeijing
Period6/21/086/25/08

ASJC Scopus subject areas

  • Hardware and Architecture

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  • Cite this

    Li, X., Adve, S. V., Bose, P., & Rivers, J. A. (2008). Online estimation of architectural vulnerability factor for soft errors. In ISCA 2008, Proceedings - 35th International Symposium on Computer Architecture (pp. 341-352). [4556738] (Proceedings - International Symposium on Computer Architecture). https://doi.org/10.1109/ISCA.2008.9