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On optimal board-level routing for FPGA-based logic emulation
Wai Kei Mak,
D. F. Wong
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Dive into the research topics of 'On optimal board-level routing for FPGA-based logic emulation'. Together they form a unique fingerprint.
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Keyphrases
Array-based
100%
Field Programmable Gate Arrays
100%
Board Level
100%
Emulation System
100%
Logic Emulation
100%
Multi-terminal
66%
Routing Problem
66%
System Design
33%
NP-complete
33%
Two-terminal
33%
Additional Resources
33%
Iterative Computation
33%
Time-optimal Algorithm
33%
Array chip
33%
Interchip
33%
Realizer
33%
Euler Circuit
33%
Computer Science
Field Programmable Gate Arrays
100%
Routing Problem
66%
Multiterminal Net
66%
Input/Output
33%
Optimal Algorithm
33%
Engineering
Field Programmable Gate Arrays
100%
Routing Problem
66%
Design System
33%
Signal Pin
33%
Mathematics
Optimal Time
100%
Euler circuit
100%