Abstract
Electron projection lithography (EPL) is a leading candidate for next generation lithography (NGL) in VLSI production. The membrane mask used in EPL is divided into sub-fields by struts for structural support. A layout must be partitioned into these sub-fields on mask and then stitched back together by the EPL tool on wafer. To minimize possible stitching errors, partitioning of a mask layout should minimize cuts of layout features in the overlapping area between two adjacent sub-fields. This paper presents the first formulation of the mask layout partitioning problem for EPL as a graph problem. The graph formulation is optimally solved with a shortest path approach. Two other techniques are also presented to speed up computation. Experimental runs on data from a real industry design show excellent results.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 514-518 |
| Number of pages | 5 |
| Journal | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers |
| DOIs | |
| State | Published - 2002 |
| Event | IEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States Duration: Nov 10 2002 → Nov 14 2002 |
ASJC Scopus subject areas
- Software
- Computer Science Applications
- Computer Graphics and Computer-Aided Design