Abstract

This paper explores hardware acceleration to significantly improve the runtime of computing the forward algorithm on Pair-HMM models, a crucial step in analyzing mutations in sequenced genomes. We describe 1) the design and evaluation of a novel accelerator architecture that can efficiently process real sequence data without performing wasteful work; and 2) aggressive memoization techniques that can significantly reduce the number of invocations of, and the amount of data transferred to the accelerator. We describe our demonstration of the design on a Xilinx Virtex 7 FPGA in an IBM Power8 system. Our design achieves a 14.85× higher throughput than an 8-core CPU baseline (that uses SIMD and multi-threading) and a 147.49 × improvement in throughput per unit of energy expended on the NA12878 sample.

Original languageEnglish (US)
Title of host publication2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017
EditorsDiana Gohringer, Dirk Stroobandt, Nele Mentens, Marco Santambrogio, Jari Nurmi
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9789090304281
DOIs
StatePublished - Oct 2 2017
Event27th International Conference on Field Programmable Logic and Applications, FPL 2017 - Gent, Belgium
Duration: Sep 4 2017Sep 6 2017

Publication series

Name2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017

Other

Other27th International Conference on Field Programmable Logic and Applications, FPL 2017
Country/TerritoryBelgium
CityGent
Period9/4/179/6/17

Keywords

  • Bioinformatics
  • Coprocessors
  • Genomics
  • Reconfigurable architectures

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Computer Science Applications
  • Hardware and Architecture
  • Software

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