Abstract
High-performance computing increasingly relies on heterogeneous systems with specialized hardware accelerators to improve application performance. For example, NVIDIA’s CUDA programming system and general-purpose GPUs have emerged as a widespread accelerator in HPC systems. This trend has exacerbated challenges of data placement as accelerators often have fast local memories to fuel their computational demands, but slower interconnects to feed those memories. Crucially, real-world data-transfer performance is strongly influenced not just by the underlying hardware, but by the capabilities of the programming systems. Understanding how application performance is affected by the logical communication exposed through abstractions, as well as the underlying system topology, is crucial for developing high-performance applications and architectures. This report presents initial data-transfer microbenchmark results from two POWER-based systems obtained during work towards developing an automated system performance characterization tool.
| Original language | English (US) |
|---|---|
| Title of host publication | High Performance Computing - ISC High Performance 2018 International Workshops, Revised Selected Papers |
| Editors | Michèle Weiland, Sadaf Alam, Rio Yokota, John Shalf |
| Publisher | Springer-Verlag |
| Pages | 448-454 |
| Number of pages | 7 |
| ISBN (Print) | 9783030024642 |
| DOIs | |
| State | Published - Jan 1 2018 |
| Event | International Conference on High Performance Computing, ISC High Performance 2018 - Frankfurt, Germany Duration: Jun 28 2018 → Jun 28 2018 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 11203 LNCS |
| ISSN (Print) | 0302-9743 |
| ISSN (Electronic) | 1611-3349 |
Conference
| Conference | International Conference on High Performance Computing, ISC High Performance 2018 |
|---|---|
| Country | Germany |
| City | Frankfurt |
| Period | 6/28/18 → 6/28/18 |
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Keywords
- Benchmark
- CUDA
- GPGPU
- NVLink
- Unified Memory
ASJC Scopus subject areas
- Theoretical Computer Science
- Computer Science(all)
Cite this
NUMA-Aware Data-Transfer Measurements for Power/NVLink Multi-GPU Systems. / Pearson, Carl; Chung, I. Hsin; Sura, Zehra; Hwu, Wen-Mei W; Xiong, Jinjun.
High Performance Computing - ISC High Performance 2018 International Workshops, Revised Selected Papers. ed. / Michèle Weiland; Sadaf Alam; Rio Yokota; John Shalf. Springer-Verlag, 2018. p. 448-454 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 11203 LNCS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - NUMA-Aware Data-Transfer Measurements for Power/NVLink Multi-GPU Systems
AU - Pearson, Carl
AU - Chung, I. Hsin
AU - Sura, Zehra
AU - Hwu, Wen-Mei W
AU - Xiong, Jinjun
PY - 2018/1/1
Y1 - 2018/1/1
N2 - High-performance computing increasingly relies on heterogeneous systems with specialized hardware accelerators to improve application performance. For example, NVIDIA’s CUDA programming system and general-purpose GPUs have emerged as a widespread accelerator in HPC systems. This trend has exacerbated challenges of data placement as accelerators often have fast local memories to fuel their computational demands, but slower interconnects to feed those memories. Crucially, real-world data-transfer performance is strongly influenced not just by the underlying hardware, but by the capabilities of the programming systems. Understanding how application performance is affected by the logical communication exposed through abstractions, as well as the underlying system topology, is crucial for developing high-performance applications and architectures. This report presents initial data-transfer microbenchmark results from two POWER-based systems obtained during work towards developing an automated system performance characterization tool.
AB - High-performance computing increasingly relies on heterogeneous systems with specialized hardware accelerators to improve application performance. For example, NVIDIA’s CUDA programming system and general-purpose GPUs have emerged as a widespread accelerator in HPC systems. This trend has exacerbated challenges of data placement as accelerators often have fast local memories to fuel their computational demands, but slower interconnects to feed those memories. Crucially, real-world data-transfer performance is strongly influenced not just by the underlying hardware, but by the capabilities of the programming systems. Understanding how application performance is affected by the logical communication exposed through abstractions, as well as the underlying system topology, is crucial for developing high-performance applications and architectures. This report presents initial data-transfer microbenchmark results from two POWER-based systems obtained during work towards developing an automated system performance characterization tool.
KW - Benchmark
KW - CUDA
KW - GPGPU
KW - NVLink
KW - Unified Memory
UR - http://www.scopus.com/inward/record.url?scp=85066126248&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85066126248&partnerID=8YFLogxK
U2 - 10.1007/978-3-030-02465-9_32
DO - 10.1007/978-3-030-02465-9_32
M3 - Conference contribution
SN - 9783030024642
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 448
EP - 454
BT - High Performance Computing - ISC High Performance 2018 International Workshops, Revised Selected Papers
A2 - Weiland, Michèle
A2 - Alam, Sadaf
A2 - Yokota, Rio
A2 - Shalf, John
PB - Springer-Verlag
ER -