Abstract
New architectures for modified MMR shape encoding and decoding are presented. MPEG-4 is first briefly described, as is the modified MMR algorithm proposed for use in MPEG-4 shape coding. Architectures for encoding and decoding which reduce memory access, use custom hardware to accelerate critical components, require little external control, and can be easily pipelined or parallelized are described.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1205-1208 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 2 |
| State | Published - 1997 |
| Event | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) - Hong Kong, Hong Kong Duration: Jun 9 1997 → Jun 12 1997 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering