Network Packet Processing Mode-Aware Power Management for Data Center Servers

Ki Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim

Research output: Contribution to journalArticlepeer-review


In data center servers, power management (PM) exploiting Dynamic Voltage and Frequency Scaling (DVFS) for processors can play a crucial role to improve energy efficiency. However, we observe that current PM policies (i.e., governors) not only considerably increase tail response time (i.e., violate a given Service Level Objective (SLO)) but also hurt energy efficiency. Tackling limitations of current PM governors, we propose NMAP, Network packet processing Mode-Aware Power management. NMAP improves energy efficiency while satisfying given SLOs, considering packet processing status on a core for PM by monitoring transitions between network packet processing modes - interrupt and polling. Tracking the transitions, NMAP detects moments that a core cannot process packets fast enough and forces the core to immediately raise the voltage and frequency (V/F) state. As a result, NMAP can provide not only low response time but also low energy consumption. Our experiment shows that NMAP improves tail response time by up to 4.1× compared with the ondemand governor, reducing energy by up to 44.6 percent compared with the performance governor.

Original languageEnglish (US)
Article number8752066
Pages (from-to)1-4
Number of pages4
JournalIEEE Computer Architecture Letters
Issue number1
StatePublished - Jan 1 2020


  • Data center server
  • dynamic voltage and frequency scaling
  • power management
  • tail latency

ASJC Scopus subject areas

  • Hardware and Architecture


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