Multiprocessor Pyramid Architectures for Bottom-Up Image Analysis

Narendra Ahuja, Sowmitri Swamy

Research output: Contribution to journalArticlepeer-review

Abstract

This paper describes three hierarchical organizations of small processors for bottom-up image analysis:pyramids, interleaved pyramids, and pyramid trees. Progressively lower levels in the hierarchies process image windows of decreasing size. Bottom-up analysis is madn feasible by transmitting up the levels quadrant borders and border-related information that captures quadrant interaction of interest for a given computation. The operation of the pyramid is illustrated by examples of standard algorithms for interior-based computations (e.g., area) and border-based computations of local properties (e.g., perimeter). A connected component counting algorithm is outlined that illustrates the role of border-related information in representing quadrant interaction. Interleaved pyramids are obtained by sharing processors among several pyramids. They increase processor utilization and throughput rate at the cost of increased hardware.

Original languageEnglish (US)
Pages (from-to)463-475
Number of pages13
JournalIEEE transactions on pattern analysis and machine intelligence
VolumePAMI-6
Issue number4
DOIs
StatePublished - Jul 1984

Keywords

  • Divide-and-conquer
  • image analysis
  • image decomposition
  • interleaving
  • paralel processing
  • performance evaluation
  • pipelining
  • pyramid architectures

ASJC Scopus subject areas

  • Software
  • Computer Vision and Pattern Recognition
  • Computational Theory and Mathematics
  • Artificial Intelligence
  • Applied Mathematics

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