Multiplexor network generation in high level synthesis

Yung Ming Fang, D. F. Wong

Research output: Contribution to conferencePaper

Abstract

In high level synthesis, after the binding stage, multiplexor network is generated to connect the outputs of modules (functional-units/registers) to the inputs of modules. In this paper, we present an algorithm to generate a 2-to-1 multiplexor network with minimum number of multiplexors. Our algorithm is based on iteratively solving minimum vertex cover problems. Experimental results show that our approach obtains 8 to 25% improvement over a direct multiplexor-forest approach.

Original languageEnglish (US)
Pages78-83
Number of pages6
StatePublished - Dec 1 1996
Externally publishedYes
EventProceedings of the 1996 International Conference on Computer Design, ICCD'96 - Austin, TX, USA
Duration: Oct 7 1996Oct 9 1996

Other

OtherProceedings of the 1996 International Conference on Computer Design, ICCD'96
CityAustin, TX, USA
Period10/7/9610/9/96

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Fang, Y. M., & Wong, D. F. (1996). Multiplexor network generation in high level synthesis. 78-83. Paper presented at Proceedings of the 1996 International Conference on Computer Design, ICCD'96, Austin, TX, USA, .