Multilevel granularity parallelism synthesis on FPGAs

Keyphrases

• Parallelization 100%
• Granularity 100%
• High-level Synthesis 75%
• CUDA Kernel 50%
• High Performance 25%
• Source Code 25%
• Estimation Model 25%
• Synthesis Methods 25%
• In Tandem 25%
• Design Space 25%
• Performance Evaluation 25%
• Optimal Configuration 25%
• Full Implementation 25%
• Energy Cost 25%
• Design Layout 25%
• Near-optimal 25%
• Synthesis Design 25%
• Clock Period 25%
• Physical Design 25%
• Reconfigurable Computing 25%
• Design Flow 25%
• FPGA-based 25%
• Levels of Abstraction 25%
• Competitive Performance 25%
• FPGA Programming 25%
• Coarse-grained Parallelism 25%
• Logic Synthesis 25%
• FPGA Acceleration 25%
• Synthesis Framework 25%
• Parallelism Extraction 25%
• Different Granularity 25%
• Execution Cycle 25%
• Spatial Parallelism 25%
• Search Heuristics 25%
• Execution Frequency 25%
• Implementation Evaluation 25%
• Design Space Search 25%
• Layout Information 25%
• Model Layout 25%
• Parallel Exploration 25%
• Netlist 25%
• Multi-granularity 25%

Computer Science

• Parallelism 100%
• Granularity 100%
• Field Programmable Gate Arrays 100%
• High Level Synthesis 50%
• Performance Evaluation 16%
• Experimental Result 16%
• Kernel Execution 16%
• reconfigurable computing 16%
• Search Heuristic 16%
• Optimal Configuration 16%
• Clock Period 16%
• Coarse-Grained Parallelism 16%
• Physical Design 16%
• Logic Synthesis 16%
• Computing Domain 16%
• Synthesis Technique 16%
• Kernel Configuration 16%
• Scientific Domain 16%
• Spatial Parallelism 16%
• Graphics Processing Unit 16%
• Computer Hardware 16%