Modeling of substrate noise in monolithic integrated circuits

George Manetas; Andreas C Cangellaris

doi:10.1109/SMIC.2010.5422981

Modeling of substrate noise in monolithic integrated circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A convenient model is presented for the expedient calculation of semiconductor substrate-induced noise coupling under quasi-static conditions. The proposed model is motivated by the desire to provide for a quick means for predictive assessment of substrate noise levels with computational efficiency appropriate for noise-aware floorplanning and routing considerations early in the design phase. While computationally efficient, the quasi-static attributes of the model call for an assessment of the frequency range of its validity. To provide for this, a fullwave electrodynamic model is used to derive a quantity, termed dynamic factor, as a means to assess the accuracy of the quasi-static model versus frequency and substrate properties.

Original language	English (US)
Title of host publication	2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers
Pages	172-175
Number of pages	4
DOIs	https://doi.org/10.1109/SMIC.2010.5422981
State	Published - Apr 23 2010
Event	2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - New Orleans, LA, United States Duration: Jan 11 2010 → Jan 13 2010

Publication series

Name	2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers

Other

Other	2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010
Country	United States
City	New Orleans, LA
Period	1/11/10 → 1/13/10

Keywords

Electromagnetic interference
Modeling
Substrate noise

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/SMIC.2010.5422981

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Manetas, G., & Cangellaris, A. C. (2010). Modeling of substrate noise in monolithic integrated circuits. In 2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers (pp. 172-175). [5422981] (2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers). https://doi.org/10.1109/SMIC.2010.5422981

Modeling of substrate noise in monolithic integrated circuits. / Manetas, George; Cangellaris, Andreas C.

2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers. 2010. p. 172-175 5422981 (2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Manetas, G & Cangellaris, AC 2010, Modeling of substrate noise in monolithic integrated circuits. in 2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers., 5422981, 2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers, pp. 172-175, 2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010, New Orleans, LA, United States, 1/11/10. https://doi.org/10.1109/SMIC.2010.5422981

Manetas G, Cangellaris AC. Modeling of substrate noise in monolithic integrated circuits. In 2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers. 2010. p. 172-175. 5422981. (2010 10th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2010 - Digest of Papers). https://doi.org/10.1109/SMIC.2010.5422981

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