Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs

Qiurong He; Milton Feng

Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We have developed a model for power supply parasitics to properly select the on-wafer bypass capacitor values in high-speed IC designs, which could minimize the chip area while maintaining the circuit performance. The procedures to develop this model are described and suitable for all device technologies. An InGaP/GaAs HBT transimpedance amplifier with 10-GHz bandwidth was designed and fabricated. The simulation with the model matches the measured results very well.

Original language	English (US)
Title of host publication	2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Subtitle of host publication	Digest of Papers
Editors	J.D. Cressler, J. Papapolymerou
Pages	175-178
Number of pages	4
State	Published - 2004
Event	2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers - Atlanta, GA, United States Duration: Sep 8 2004 → Sep 10 2004

Publication series

Name	2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers

Other

Other	2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers
Country/Territory	United States
City	Atlanta, GA
Period	9/8/04 → 9/10/04

ASJC Scopus subject areas

General Engineering

Library availability

Discover UIUC Full Text

Cite this

He, Q., & Feng, M. (2004). Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs. In J. D. Cressler, & J. Papapolymerou (Eds.), 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers (pp. 175-178). (2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers).

Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs. / He, Qiurong; Feng, Milton.
2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers. ed. / J.D. Cressler; J. Papapolymerou. 2004. p. 175-178 (2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

He, Q & Feng, M 2004, Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs. in JD Cressler & J Papapolymerou (eds), 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers. 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp. 175-178, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, Atlanta, GA, United States, 9/8/04.

He Q, Feng M. Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs. In Cressler JD, Papapolymerou J, editors, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers. 2004. p. 175-178. (2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers).

He, Qiurong ; Feng, Milton. / Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs. 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers. editor / J.D. Cressler ; J. Papapolymerou. 2004. pp. 175-178 (2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers).

@inproceedings{cf55eace60b048afbaf98201bf9dd6e1,

title = "Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs",

abstract = "We have developed a model for power supply parasitics to properly select the on-wafer bypass capacitor values in high-speed IC designs, which could minimize the chip area while maintaining the circuit performance. The procedures to develop this model are described and suitable for all device technologies. An InGaP/GaAs HBT transimpedance amplifier with 10-GHz bandwidth was designed and fabricated. The simulation with the model matches the measured results very well.",

author = "Qiurong He and Milton Feng",

year = "2004",

language = "English (US)",

isbn = "0780387031",

series = "2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers",

pages = "175--178",

editor = "J.D. Cressler and J. Papapolymerou",

booktitle = "2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems",

note = "2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers ; Conference date: 08-09-2004 Through 10-09-2004",

}

TY - GEN

T1 - Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs

AU - He, Qiurong

AU - Feng, Milton

PY - 2004

Y1 - 2004

N2 - We have developed a model for power supply parasitics to properly select the on-wafer bypass capacitor values in high-speed IC designs, which could minimize the chip area while maintaining the circuit performance. The procedures to develop this model are described and suitable for all device technologies. An InGaP/GaAs HBT transimpedance amplifier with 10-GHz bandwidth was designed and fabricated. The simulation with the model matches the measured results very well.

AB - We have developed a model for power supply parasitics to properly select the on-wafer bypass capacitor values in high-speed IC designs, which could minimize the chip area while maintaining the circuit performance. The procedures to develop this model are described and suitable for all device technologies. An InGaP/GaAs HBT transimpedance amplifier with 10-GHz bandwidth was designed and fabricated. The simulation with the model matches the measured results very well.

UR - http://www.scopus.com/inward/record.url?scp=20344364616&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=20344364616&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:20344364616

SN - 0780387031

T3 - 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers

SP - 175

EP - 178

BT - 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

A2 - Cressler, J.D.

A2 - Papapolymerou, J.

T2 - 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers

Y2 - 8 September 2004 through 10 September 2004

ER -

Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs

Abstract

Publication series

Other

ASJC Scopus subject areas

Library availability

Related links

Fingerprint

Cite this