Modeling of majority and minority carrier triggered external latchup

Farzan Farbiz, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Circuit models are presented that allow one to identify the worst-case testing condition for external latchup and to simulate the value of the latchup trigger current. The models are valid under both moderate and high-level injection. A good fit between the model and the measurements is observed. The roles of substrate majority and minority carriers are elucidated.

Original languageEnglish (US)
Title of host publication46th Annual 2008 IEEE International Reliability Physics Symposium Proceedings, IRPS
Pages270-277
Number of pages8
DOIs
StatePublished - Sep 17 2008
Event46th Annual 2008 IEEE International Reliability Physics Symposium, IRPS - Phoenix, AZ, United States
Duration: Apr 27 2008May 1 2008

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other46th Annual 2008 IEEE International Reliability Physics Symposium, IRPS
Country/TerritoryUnited States
CityPhoenix, AZ
Period4/27/085/1/08

Keywords

  • Circuit models
  • Latchup

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint

Dive into the research topics of 'Modeling of majority and minority carrier triggered external latchup'. Together they form a unique fingerprint.

Cite this