Modeling of Content addressable memory using 2D Reconfigurable Transistors

Ashwin Tunga, Junzhe Kang, Ziing Zhao, Ankit Shukla, Wenjuan Zhu, Shaloo Rakheja

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Content-addressable memory (CAM) compares input search data with stored data, returning the address upon a match. CAMs offer high-speed parallel search, making them ideal for associative memory applications. CAMs are categorized into binary (BCAMs) and ternary CAMs (TCAMs). BCAMs store two states and require an exact match for a successful search, while TCAMs can store a third state, 'don't care' or 'X', always resulting in a match. Traditionally, CAMs are implemented using CMOS static random-access memory (SRAM). However, SRAM-based CAMs use ≥ 9 transistors, increasing the area and power dissipation. Recently, 2D reconfigurable transistors (RFETs) have emerged as a promising technology for TCAMs. 2D-RFET TCAMs offer high on/off ratio, low power consumption, non-volatile data storage, and low area requirement, using only 1T for realizing a CAM [1].

Original languageEnglish (US)
Title of host publicationDRC 2024 - 82nd Device Research Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350373738
DOIs
StatePublished - 2024
Externally publishedYes
Event82nd Device Research Conference, DRC 2024 - College Park, United States
Duration: Jun 24 2024Jun 26 2024

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770

Conference

Conference82nd Device Research Conference, DRC 2024
Country/TerritoryUnited States
CityCollege Park
Period6/24/246/26/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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