Modeling memory access behavior for data mapping

Matthias Diener, Eduardo H.M. Cruz, Philippe O.A. Navaux

Research output: Contribution to journalArticlepeer-review

Abstract

Many modern parallel architectures feature a nonuniform memory access (NUMA) behavior since they contain several memory controllers. In such architectures, deciding where to place memory pages has a high influence on the performance of parallel applications. This placement of pages to NUMA nodes is called data mapping. Two basic types of data mapping policies exist, focusing on improving the locality or the balance of memory accesses. In this article, we introduce a comprehensive set of metrics to characterize the memory access behavior of parallel applications with the aim of describing their suitability for different data mapping policies. We present and evaluate different policies that improve locality, balance, or both. Experiments were performed on three highly different NUMA architectures with two parallel benchmark suites. Results show that the improvements of the policies depend on the characteristics of the architectures and applications, and that our characterization has a high accuracy regarding the behavior. We also find that a mixed policy, which takes both locality and balance into account, can lead to the highest gains overall, while avoiding the performance losses that are caused by applying simple policies that focus only on one metric.

Original languageEnglish (US)
Pages (from-to)212-228
Number of pages17
JournalInternational Journal of High Performance Computing Applications
Volume31
Issue number3
DOIs
StatePublished - May 1 2017
Externally publishedYes

Keywords

  • balance
  • data mapping
  • locality
  • memory access behavior
  • NUMA

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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